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--- mbbsemu:faq:performance [2023/11/27 03:18] – enusbaum
+++ mbbsemu:faq:performance [2023/11/27 15:23] (current) – enusbaum
@@ Line 9: / Line 9: @@
 In summary, MBBSEmu's design, which prioritizes ease of debugging through an interpreter-based CPU core, does not significantly impede performance due to the inherent efficiency of its event-driven architecture and the comparatively modest hardware requirements of the original software it emulates. Consequently, MBBSEmu can deliver a seamless emulation experience on modern computing systems, demonstrating the successful adaptation of legacy software to contemporary hardware environments.
+===== MBBSEmu Performance Benchmark =====
+Within the MBBSEmu source code, a specialized benchmark tool has been developed to assess the core performance of the emulated CPU, located in the [[https://github.com/mbbsemu/MBBSEmu/tree/master/MBBSEmu.CPU.Benchmark|MBBSEmu.CPU.Benchmark project]]. This benchmark is designed to evaluate the "Instructions Per Second" rate that the emulated CPU core is capable of executing.
+The core of this benchmark is a succinct and continuous loop, delineated as follows in the assembly code snippet 'benchmark.asm':
+<file asm benchmark.asm>
+reset:
+   MOV _word_ptr[0], 1     //Set Memory Value to 1
+loop:
+   MOV AX, _word_ptr[0]    //Move Memory Value into AX
+   CMP AX, 0x7FFF          //Compare AX to 0x7FFF
+   JE reset                //If Equal, Reset memory value back to 1
+   INC _word_ptr[0]        //Otherwise increment the value in memory by 1
+   JMP loop                //Continue the Loop
+</file>
+This looping structure is selected for the benchmarking process due to its ability to engage various critical operations that are integral to CPU performance assessment:
+  - It involves both reading from and writing to registers.
+  - It executes memory read/write operations.
+  - The loop includes arithmetic operations, here exemplified by the CMP instruction, and flag evaluations, as seen in the JE (Jump if Equal) instruction.
+  - It incorporates both conditional (JE) and unconditional (JMP) jumps, allowing for a comprehensive examination of the CPU's ability to handle various control flow scenarios.
+Through this compact yet effective loop, the benchmark provides a thorough evaluation of the CPU's capabilities in handling typical operations that would be encountered in a real-world emulation scenario.
 ===== Performance Comparison Chart =====